This application claims a priority based on Japanese patent application No. 6-240680 (240680/'94) filed on Sep. 8, 1994.
Conventional vapor phase epitaxy, in particular, OMVPE (or MOCVD) suffers from the problem that convex defects which are called hillocks appear on surfaces of epitaxially grown films. serveral investigations have been conducted for clarifying the relations between the generation of the defects and serveral factors, which include the surface orientation of substrates, the speed of crystal growth and the temperature of the growth, in order to reduce the number of the hillocks.
For example, Japanese Patent Laying Open No. 2-239188 (239188/'90) mentions to the problem of surface defects called "growth pyramid" or "faceted defects" which arise in the vapor phase epitaxy of compound semiconductors. This prior application describes that the "off-angle" method had been adopted to suppress the occurrence of the surface defects. The off-angle method is a method of growing films epitaxially on a wafer which has an orientation of the surface inclining at 1.degree. to 7.degree. to a (100) plane. Off-angled wafers, however, cannot be adopted for making special devices, for example, laser diodes which require forming gratings on the surface waveguides. The grating having regularly spaced grooves demands a just-(100) wafer as a substrate. The just-(100) wafer referred to herein means a wafer having a surface which correctly corresponds to a (100) plane. An off-angled (100) wafer indicates a wafer having a surface which inclines slightly to a (100) plane. If the inclination angle is .alpha., the wafer is designated as a (100).+-..alpha.. The application mentions that some of the off-angle wafers were still accompanied by the faceted defects and a lot of faceted defects arose in a small off-angled wafer having an off-angle less than 0.1 degree. Thus Japanese Patent Laying Open No.2-239188 proposes an improvement of vapor phase epitaxy including the processes of preparing an off-angle wafer with a slanting-angle between 0.1.degree. and 0.5.degree. to a (100) plane, maintaining the substrate wafer at a temperature between 600.degree. C. and 700.degree. C., and growing semiconductor films on the heated, off-angled substrate in vapor phase.
Japanese Patent Laying Open No. 5-301795 (301795/93) proposes a method of reducing droplet-defects appearing on the surface of a substrate in an epitaxial growth of compound semiconductors in vapor phase. For decreasing the number of the droplet-defects, the prior art suggests an inequality EQU 0.011V.sup.1.5 +6.21.times.10.sup.20 T.sup.-7.5 .ltoreq..theta..ltoreq.0.20
where .theta. is the off angle of the wafer from a (100) plane, V is the speed of the epitaxial growth and T is the temperature of the substrate. The application mentions that the defects could be decreased by growing the compound semiconductor films on the wafers which satisfy the inequality. Faster growth demands a higher substrate temperature. Lower growing speed requires a reduction of the substrate temperature to the contrary. This is the meaning of the inequality. It is, however, still unclear why the speed V and temperature T are accompanied with the order of magnitude of 1.5 and -7.5 respectively.
Japanese Patent Laying Open No. 64-32686 (32686/'89) discloses to production of avalanche photodiodes by the halogen transport CVD method. The application discusses the problems of both an occurrence of a lot of hillocks and a big fluctuation of film thickness of the avalanche layer, when InP wafers having a small off-angle less than .+-.0.1.degree. from a (100) plane were adopted as substrates. Then this prior art suggests an epitaxial growth having the processes of preparing off-angle InP wafers inclining at 0.2 degree to 0.5 degree to a (100) plane, and forming epitaxially a light absorption layer and an avalanche layer of the off-angle substrate wafer. The occurrence of hillocks is reportedly suppressed by the off-angle substrate.
Japanese Patent Laying Open No. 64-22072 (22072/'89) points out the problems of the dispersion of the thicknesses of a window layer and a buffer layer, and of the fluctuation of the depth of pn-junctions, when InP type photodiodes were produced on just-(100) InP wafers by the halogen transport vapor phase epitaxy. The prior art suggests a use of an off-angled InP with an off-angle between 0.2 and 0.5 on which a buffer layer and a light absorption layer were deposited. The application also mentions that the contrivance succeeded in reducing the fluctuation of the film thicknesses and in enhancing the yield of the products.
Japanese Patent Laying Open No. 64-15914 described the problem of the difficulty of controlling the film thickness due to the occurrence of hillocks, when InP photodiodes were produced by growing epitaxially InGaAsP films and so forth on a just-(100) InP wafer by halogen transport CVD method. It reports that the uniformity of the film thickness was improved by growing multi-layered InGaAsP thin films on an off-angle InP wafer inclining at an angle between 0.2 degree and 0.5 degree to a (100) plane.
Japanese Patent Laying Open No. 1-270599 (270599/'89) alludes to the problems of the weak photoluminescence (PL) of a double-hetero structure produced on a just-(100) InP wafer by an MBE method and of the high threshold current of the laser diodes further made on the same double-hereto structure. For avoiding these difficulties, the application suggests a method of fabricating the double-hetero structure by the MBE method on an off-angle InP wafer having a surface slanting at 0.5 degree to 2 degrees to a (111) plane. This prior art provides for using a (111) wafer instead of a (100) wafer, and mentions that the threshold current was reduced by the adoption of the off-angle (111) InP wafer.
Japanese Patent Publication No. 4-73610 (73610/'92) proposes an epitaxial growth of compound semiconductor films on an off-angle GaAs wafer slanting at 0.1 degree to 1 degree to a (111)B plane for making quantum-well laser diodes or high speed FETs based on the two-dimensional electron gas. The inventors state that the inclination of a GaAs wafer ranging from 0.1 degree to 1 degree made the epitaxial films mirror-smooth and enhanced the photoluminescence, and report that the off-angle (111) GaAs wafer was superior to the (001) GaAs wafer.
Japanese Patent Laying Open No. 62-88318 (88318/'87) proposes an epitaxial growth of thin compound semiconductor films on an off-angle (111) GaAs wafer slanting at an angle between 0.1.degree. and 1.degree. to a (111)B plane. It discloses that the thin films deposited on the off-angle (111)B GaAs wafer exhibited stronger photoluminescence than the thin film made on a (001) GaAs wafer.
Japanese Patent Laying Open No. 3-16993 (16993/'91) points out the problem of the ruggedness of thin films epitaxially grown on a just-(100) GaAs wafer in vapor phase. The ruggedness was induced by the striped morphology called "cross-hatching". It states that the cross-hatchings were reduced by adopting an off-angle wafer slanting at an angle between 0.5 degree and 10 degrees to a (100) plane.
Japanese Patent Laying Open No. 2-288223 (288223/'90) points out the problem of the occurrence of rice-grain defects appearing on surfaces of HEMTs (High Electron Mobility Transistor) which were made by growing AlGaAs films on (100) GaAs wafers. According to this application the rice-grain defects were caused by the inclination of the (100) GaAs wafer to a (100) plane. It reports that the deviation of the orientation of the (100) wafer should be less than 0.15 degree, preferably less than 0.05 degree in order to prevent the rice-grain defects from arising on the surfaces. This opinion contradicts to the prior art which have been explained till now.
Japanese Patent Laying Open No. 1-128423 (128423/'89) discloses the employment of an off-angled GaAs wafer slanting at an angle of 0.5 degree to 10 degrees to a (100) plane in order to avoid the ruggedness of the film surfaces brought about by growing a thin films including aluminum on a GaAs wafer either by an MBE method or an MO-MBE method.